Author: mk

  • DRV10983 FG Function and Current/Torque Measurement: MotorCurrent Register and Datasheet Revision Considerations

    The DRV10983 from Texas Instruments (TI) targets 12V to 24V systems as a 3-phase sensorless BLDC motor driver IC, driving motors with sinusoidal excitation without external Hall sensors. When implementing driver control and status diagnostics, selecting the FG (Frequency Generator) pin for rotational speed feedback and the current sensing methodology for load torque estimation are key design considerations.


    1. Operating Principles of the DRV10983 FG Signal and RPM Measurement Mechanism

    The FG (Frequency Generator) pin of the DRV10983 outputs digital pulses synchronized with the electrical rotation period of the motor rotor, serving as an interrupt source for real-time RPM measurement, closed-loop speed control, and motor stall/lock detection.

    Open-Drain Interface Circuit

    The internal output stage of the FG pin features an open-drain N-channel MOSFET structure. Because no internal pull-up resistor is integrated, an external pull-up resistor (\(R_{PU}\)) must be populated to pull the signal line to a logic high.

    The supply rail for the pull-up resistor connects to the I/O logic level of the host MCU (+3.3V or +5V), with a recommended resistance range of \(4.7\text{ k}\Omega \sim 10\text{ k}\Omega\). If the resistance is excessively high, the PCB load capacitance delays the rise time of the square wave, causing pulse distortion at high rotational speeds; conversely, if it is too low, unnecessary sink current consumption increases in the low state.

    DRV10983 FG open-drain output, pull-up resistor, and MCU input capture interface schematic
    DRV10983 FG Open-Drain output stage and MCU Input Capture pin pull-up resistor interface schematic

    Frequency and RPM Conversion Formulas

    The frequency of the square wave output from the FG pin (\(f_{FG}\)) is proportional to the mechanical speed of the motor (RPM), the number of rotor poles (Poles, \(P\)), and the internal FGcycle register setting coefficient of the DRV10983 (\(K_{FG}\)).

    \[f_{FG} = \left( \frac{\text{RPM} \times P}{120} \right) \times K_{FG}\]

    The formula for calculating the actual motor rotational speed back from \(f_{FG}\) measured via the MCU timer input capture interrupt is as follows:

    \[\text{RPM} = \frac{120 \times f_{FG}}{P \times K_{FG}}\]
    • \(P\): Motor pole count (number of poles; e.g., for an 8-pole motor, \(P=8\))
    • \(K_{FG}\): Output pulse scaling factor determined by the FGcycle register setting (controls electrical pulses per 1 revolution by default)
    Graph for an 8-pole motor showing DRV10983 FG output frequency versus RPM
    RPM–FG frequency relationship for an 8-pole motor with K_FG=1. Values calculated from formulas.

    For an 8-pole (\(P=8\)) motor configured with \(K_{FG}=1\), per 1 mechanical revolution, 4 electrical cycles are generated, so operating at \(2,000\text{ RPM}\) results in an FG frequency of exactly \(133.3\text{ Hz}\).


    2. Torque Estimation Limits of the FG Signal and the Necessity of Phase Current Sensing

    When designing motor control firmware, confusion often arises regarding estimating load torque by monitoring changes in the FG pin frequency or duty cycle. However, the FG signal alone cannot determine motor load torque in the steady-state.

    Physical Decoupling of Speed and Torque

    The FG output signal purely provides information on the rate of change of the rotor electrical position—that is, mechanical speed alone. If the motor driver performs closed-loop speed control to maintain \(2,000\text{ RPM}\) constant, the FG pin output frequency remains identically \(133.3\text{ Hz}\) in both an unloaded no-load condition and a heavily loaded rated-load condition.

    Although a temporary frequency drop can be observed during transient states when a sudden load step causes a speed dip, the frequency converges back to the target RPM once the speed loop restores steady-state, making it impossible to determine the magnitude of the steady-state load torque.

    Phase Current (\(I_{phase}\)) as an Essential Requirement for Torque Calculation

    The electromagnetic torque (\(T\)) of permanent magnet synchronous and BLDC motors is directly proportional to the product of the motor torque constant (\(K_t\)) and the active phase current (\(I_{phase}\)) flowing through the stator windings:

    \[T = K_t \times I_{phase}\]

    Even when maintaining a constant speed, as the load torque increases, the driver increases the applied voltage duty cycle to overcome back-EMF and generate torque, causing the motor winding current (\(I_{phase}\)) to rise proportionally. Therefore, to quantitatively measure motor output torque and load conditions, phase current or DC-link bus current data must be obtained.


    3. Datasheet Revision Trap: MotorCurrent Specification Changes Between 2014 Rev and 2020 Rev H

    When evaluating the current measurement capability of the DRV10983, the most critical hardware engineering risk is the issue of missing specifications depending on which datasheet revision is referenced.

    Item Early 2014 Datasheet (Rev. C, etc.) 2020 Revised Datasheet, Month 5 (Rev. H)
    0x17 Register Omitted or marked as Reserved MotorCurrent1 (current upper bits) officially specified
    0x18 Register Omitted or marked as Reserved MotorCurrent2 (current lower bits) officially specified
    11-Bit Current Formula Not provided (misleading users into believing I2C current monitoring is unsupported) \(11\text{비트}\) piecewise conversion formula included
    Revision History (Rev History) – “Added MotorCurrent1 and MotorCurrent2 to Register Map” explicitly stated

    When consulting the early 2014 datasheet or referencing legacy PDF copies mirrored on unofficial archives, the 0x17 and 0x18 addresses in the register map are empty and marked as “Reserved,” easily leading to the erroneous conclusion that “the DRV10983 does not support internal current monitoring, necessitating an external shunt resistor and current sense amplifier circuit.”

    However, in the official Rev H datasheet revised in 2020-5, the specifications for the 11-bit MotorCurrent[10:0] data registers derived through the internal ADC were officially established. Therefore, hardware designers must verify the register map based on the latest Rev H specifications.


    4. Reading the MotorCurrent Register, Conversion Formulas, and Firmware Implementation Considerations

    The DRV10983 calculates the motor peak current through internal sensing circuitry and an ADC, storing the result as an 11-bit digital value MotorCurrent[10:0] in the MotorCurrent1 (0x17) and MotorCurrent2 (0x18) registers.

    Piecewise Current Conversion Formula

    The formula for calculating the actual motor current (in A) from the 11-bit raw code (MotorCurrent[10:0], range: \(0 \sim 2047\)) features a piecewise structure bounded by code 1023:

    1. When \(\text{MotorCurrent}[10:0] \ge 1023\): \[\text{Current (A)} = \frac{3 \times (\text{MotorCurrent}[10:0] – 1023)}{512}\]

    2. When \(\text{MotorCurrent}[10:0] < 1023\): \[\text{Current (A)} = \frac{3 \times \text{MotorCurrent}[10:0]}{512}\]

    Piecewise current transfer curve of DRV10983 MotorCurrent code
    Piecewise conversion of the MotorCurrent 11-bit code and discontinuity at the 1022/1023 boundary. Values calculated from formulas.

    Noise Spikes Near 0A and Firmware Filtering

    The structural vulnerability of this conversion formula appears around code 1023. Under no-load or stopped conditions when the actual current is near 0A, around the internal calculation offset reference point of 1023, minute ADC noise on the order of 1 LSB causes a critical computational discontinuity:

    • When the code is \(1023\): \(3 \times (1023 – 1023) / 512 = 0.0\text{ A}\)
    • When noise causes the code to drop to \(1022\) by 1 LSB: Branch (2) applies, yielding \(3 \times 1022 / 512 \approx 5.988\text{ A}\)

    In other words, during no-load operation, minute noise causes the calculated current to instantly jump from \(0\text{ A}\) to approximately \(6\text{ A}\). Left unaddressed, this leads to false overcurrent faults, speed-torque loop oscillation, and erroneous motor lock/stall detection.

    Therefore, two processing stages are essential in firmware implementation: 1. Dead-band processing: Clamp LSB fluctuations within a specified range around code 1023 (e.g., in low-current regimes) to 0A. 2. Low-pass filter (LPF): Rather than using single-cycle sampled values directly, apply an 1-order IIR digital low-pass filter or a moving average filter to eliminate high-frequency spikes.

    Necessity of 0x17-Initiated 2-Byte Burst Read

    The 11-bit current data is stored across MotorCurrent1 (0x17, upper bits) and MotorCurrent2 (0x18, lower bits)—a total of 2 registers.

    When reading this value via I2C communication, one must start from address 0x17 and perform an 2-byte continuous burst read. The internal register interface of the DRV10983 is designed such that the moment the master reads address 0x17, the lower byte value at address 0x18 is locked into an internal latch.

    If I2C communication reads 0x17 and 0x18 in separate transactions or reads 0x18 first, the motor commutation timing may change between reading the upper and lower bytes, causing data corruption.

    // Example of correct I2C read implementation (Burst Read)
    uint8_t raw_buf[2];
    int16_t motor_current_raw;
    float calculated_current_A;
    
    // Continuous burst read from register 0x17 for 2 bytes (guarantees lower byte latching)
    I2C_BurstRead(DRV10983_I2C_ADDR, 0x17, raw_buf, 2);
    
    // Combine 11-bit data: MotorCurrent1(0x17)[2:0] upper 3 bits + MotorCurrent2(0x18)[7:0] lower 8 bits
    motor_current_raw = ((uint16_t)(raw_buf[0] & 0x07) << 8) | raw_buf[1];
    
    // Apply piecewise conversion and dead-band
    if (motor_current_raw >= 1023) {
        calculated_current_A = 3.0f * (float)(motor_current_raw - 1023) / 512.0f;
    } else {
        calculated_current_A = 3.0f * (float)motor_current_raw / 512.0f;
    }
    

    5. Sensing Architecture Comparison: Integrated I2C MotorCurrent vs. External Shunt Sensing

    When configuring a motor control system, deciding whether to implement torque monitoring using the internal MotorCurrent register or by adding an external shunt resistor and current sense amplifier (CSA) circuit depends on system requirements.

    Comparison Parameter Integrated I2C MotorCurrent Approach External Shunt + CSA (Current Sense Amp) Approach
    Additional Components (BOM) None (utilizes internal driver circuitry) Requires shunt resistor, current sense amplifier, and passive filter components
    PCB Footprint / Area Minimal (no additional routing required) Increased (requires area for shunt heat dissipation and Kelvin sensing traces)
    Sampling Bandwidth Low (I2C bus polling rate: tens to hundreds of Hz) High (direct MCU ADC sampling: tens to hundreds of kHz)
    Measurement Precision Moderate (limited by internal ADC resolution and presence of 1023 discontinuity noise) High (precision resistor tolerance and low-noise differential amplification)
    Primary Applications Simple overload monitoring, stall detection, fan/pump health monitoring High-speed closed-loop torque control, precise disturbance rejection, high-performance servo loops
    • Selection criteria for integrated I2C approach: Recommended when motor torque control is not the primary objective, but rather overload shutdown protection, filter clogging detection, or qualitative load level determination. It can be implemented entirely via firmware algorithms without additional BOM cost or board area.
    • Selection criteria for external shunt sensing: Essential for industrial mechanisms requiring fast load response control on the order of sub-milliseconds (ms), high-precision torque ripple suppression, or transient current protection.
  • LinkSwitch-TN2 LNK3294 and LNK3296 Design Guide: Standby Power Reduction and FB Pin ON/OFF Control

    LinkSwitch-TN2 LNK3294 and LNK3296 Design Guide: Standby Power Reduction and FB Pin ON/OFF Control

    Non-isolated offline buck converters are widely used as auxiliary power supplies for smart meters, appliance control units, industrial sensors, and IoT devices. Power Integrations’ LinkSwitch-TN2 900V series (LNK3294, LNK3296) integrates a 900V-rated power MOSFET, oscillator, ON/OFF control logic, and a high-voltage bias current source onto a single IC, minimizing external component count while delivering high reliability in harsh power grid environments.

    To reduce standby power below 30mW, an external bias design based on the EcoSmart architecture is essential. In addition, precisely calculating the FEEDBACK (FB) pin ON/OFF control resistor for the newer 2.0V reference voltage and securing 900V high-voltage safety clearances are required to ensure stable operation of the LNK3294 and LNK3296.


    1. Overview, LNK3294 vs. LNK3296 Specification Comparison, and Device Selection Criteria

    The LinkSwitch-TN2 900V family supports non-isolated buck, buck-boost, and isolated/non-isolated flyback topologies, and features an integrated 900V \(BV_{\text{DSS}}\) rated MOSFET. For industrial inputs exceeding the 85~265 VAC universal input range, suitability should not be evaluated solely by the 900V rating; steady-state DRAIN voltage, surge, clamp, and thermal conditions of the operating circuit must also be verified. Although the LNK3294 and LNK3296 share identical control architectures and pinouts, clear differences in class exist in internal MOSFET die size, on-resistance (\(R_{\text{DS(on)}}\)), peak current limit (\(I_{\text{LIMIT}}\)), and maximum output current capability.

    Parameter LNK3294 LNK3296 Design Notes
    MOSFET Breakdown Voltage (\(BV_{\text{DSS}}\)) 900 V 900 V Identical voltage rating platform
    Internal MOSFET \(R_{\text{DS(on)}}\) (100°C) Approx. 31.0 Ω Approx. 9.70 Ω Conduction loss reduced by larger die size
    Peak Current Limit (\(I_{\text{LIMIT(typ)}}\)) 257 mA (Min. 240 mA / Max. 275 mA) 482 mA (Min. 450 mA / Max. 515 mA) LNK3296 delivers approx. 1.9x higher peak current
    Maximum Output Current (Buck, MDCM) Up to 120 mA Up to 225 mA Mostly discontinuous conduction mode
    Maximum Output Current (Buck, CCM) Up to 170 mA Up to 360 mA Continuous conduction mode
    Available Package Options PDIP-8C (P), SMD-8C (G) PDIP-8C (P), SMD-8C (G) Per official datasheet
    Recommended Target Load Range MCU boards, sensor nodes (~1~2W class) Relay driving, Wi-Fi communication modules (3~5W+ class)

    According to the manufacturer’s official datasheet 900V output current table and ordering information, the LNK3294 and LNK3296 are available in PDIP-8C (P) and SMD-8C (G). Because SO-8C (D) is exclusive to the 725V family, designs must not assume LNK3294D or LNK3296D. Regardless of package selection, sufficient copper area must be provided for the SOURCE pins, and junction temperatures must be verified under actual input, load, and ambient temperature conditions.


    2. EcoSmart Standby Power Reduction Mechanism: Self-Biasing vs. External Bias Design

    LinkSwitch-TN2 employs a simple ON/OFF control scheme that enables or disables switching cycles based on the load. The standby supply current specified by the manufacturer is less than 100 µA. However, the overall no-load standby power of the converter differs significantly depending on the bias supply architecture.

    LinkSwitch-TN2 non-isolated buck converter external bias schematic
    LinkSwitch-TN2 non-isolated buck power stage and external bias schematic

    2.1 Self-Biasing Operation and Loss Factors

    In self-biasing mode, without external bias components (\(D_{\text{BIAS}}\), \(R_{\text{BIAS}}\)), the internal high-voltage current source connected to the DRAIN pin continuously charges the BYPASS (BP) pin capacitor (\(C_{\text{BP}}\)). Because the high-voltage rectified bus voltage (\(V_{\text{IN(DC)}}\)) is applied directly across the internal current source, continuous current draw across a several-hundred-volt drop results in standby losses on the order of 50 ~ 100 mW.

    2.2 Achieving Sub-30mW Standby Power via External Bias Configuration

    To minimize no-load standby power, from the output (\(V_{\text{OUT}}\)) or an auxiliary winding, a fast diode (\(D_{\text{BIAS}}\)) and a current-limiting resistor (\(R_{\text{BIAS}}\)) must be connected to inject bias current into the BP pin. When external current flows into the BP pin and maintains the operating voltage of the internal bias regulator, the internal high-voltage current source automatically shuts off. Consequently, direct leakage and drop losses from the high-voltage line are eliminated, significantly reducing no-load standby power to below 30 mW.

    The key to reducing standby power is disabling the internal high-voltage charging path using an external bias. Because actual no-load power consumption varies depending on input voltage and external component leakage currents, it must be verified on the finished product.


    3. FEEDBACK (FB) Pin ON/OFF Control Mechanism and Precision Resistor Design

    The FEEDBACK (FB) pin of the LinkSwitch-TN2 is not a conventional PWM voltage feedback node, but rather a current-sensing input that determines cycle-by-cycle switching decisions.

    3.1 FB Pin Control Thresholds and Operating Mechanism

    The current flowing into the FB pin (\(I_{\text{FB}}\)) is sampled at the beginning of each internal oscillator cycle.

    1. Switching Inhibit Threshold (\(I_{\text{FB}}\)): When the current flowing into the FB pin exceeds a typical value of 49 µA, the internal comparator triggers to inhibit the MOSFET turn-on for that switching cycle.
    2. Line Overvoltage Shutdown Threshold (\(I_{\text{FBSD}}\)): If the FB pin input current exceeds \(I_{\text{FBSD}}\) (typical value of 670 µA) for 2 consecutive cycles, Line Overvoltage Protection (Line OVP) activates, completely halting switching and entering Auto-Restart mode.

    Therefore, when injecting current into the FB pin via an external signal to forcefully disable switching, an adequate margin must be maintained so that the current is sufficiently above the switching inhibit threshold (49 µA) yet does not reach the overvoltage shutdown threshold (670 µA). The recommended control current range is 150 µA to 300 µA, with a design nominal value of approximately 200 µA.

    3.2 Newer 2.0V Reference Voltage: Control Resistor (\(R_{\text{ctrl}}\)) Calculation

    Care must be taken when dimensioning the control resistor not to adopt legacy LinkSwitch-TN parameters. The nominal FEEDBACK (FB) pin voltage (\(V_{\text{FB}}\)) of the newer LinkSwitch-TN2 is 2.0V (±1.25%). Applying the legacy LinkSwitch-TN value of 1.65V introduces calculation errors that risk deviating from the target injection current (200 µA).

    When the external control supply voltage is \(V_{\text{ctrl}}\), the correct calculation formula for control resistor \(R_{\text{ctrl}}\) is as follows:

    \[R_{\text{ctrl}} \approx \frac{V_{\text{ctrl}} – 2.0\,\text{V}}{200\,\mu\text{A}}\]

    For example, when \(V_{\text{ctrl}} = 5.0\,\text{V}\), \(R_{\text{ctrl}} \approx (5.0 – 2.0) / 200 \times 10^{-6} = 15\,\text{k}\Omega\) is obtained. If a 3.3V control supply is used, \(R_{\text{ctrl}} \approx (3.3 – 2.0) / 200 \times 10^{-6} = 6.5\,\text{k}\Omega\) (standard value of 6.2 kΩ or 6.8 kΩ) is applied.

    Optocoupler-based LinkSwitch-TN2 FB pin ON/OFF control schematic
    Optocoupler-based LinkSwitch-TN2 FB pin switching inhibit schematic
    Transient response timing waveforms for each signal during FB pin control signal assertion and release
    Transient response timing waveforms for each signal during FB pin control signal assertion and release

    Because the FB pin is a high-impedance node, it must be physically separated from switching nodes (DRAIN, inductor, freewheeling diode), and if necessary, a ceramic capacitor (\(C_{\text{FILT}}\)) of several tens of picofarads should be placed in parallel between the FB and SOURCE pins to prevent high-frequency switching noise coupling.


    4. Standby Mode Implementation Comparison: FB Pin Control vs. Output Load Disconnection (Load Switch)

    Methods for reducing power consumption when a system enters standby mode are broadly divided into the FB pin forced pull-up method and the output load switch (P-MOSFET) disconnection method.

    Comparison Item 1. Forced FB Pin Pull-Up Control (Switching Inhibit) 2. Output Load Disconnection (P-MOSFET / Load Switch) Design Considerations
    Controlled Target Inhibits IC internal MOSFET switching Physically disconnects the output power supply path
    No-Load Standby Power Excellent (sub-tens of mW) Relatively high (tens to hundreds of mW) FB control cuts off inductor/switching losses
    Switching EMI and Ripple Completely eliminated (switching stopped) Residual (converter continues pulse skipping) Advantageous during precision sensor measurement intervals
    Control Switch Component Rating Signal level (µA-class small TR or optocoupler) Power level (must handle rated load and inrush current) Reduces BOM cost and board area
    Conduction Loss (IR Drop) None Voltage drop occurs due to series \(R_{\text{DS(on)}}\) Affects efficiency at high load currents
    Recovery Speed (Turn-on) Requires restart and output capacitor charging time Relatively fast (if output is already charged) Consider system start-up time requirements

    In single-load systems where minimizing standby mode losses is paramount, the FB pin control approach—achievable with compact signal-level components—offers distinct advantages in BOM cost, mounting area, and thermal dissipation. Conversely, in environments such as communication modules where fast power recovery is required and output voltage must be maintained, adopting the output load switch method is more suitable.


    5. Non-Isolated Buck Key Power Component Selection Guide: Diode, Inductor, and Bypass Capacitor

    Because the high-voltage AC input connects directly to the inductor and switching device in a non-isolated buck converter, electrical ratings and limits of key power components must be strictly observed.

    5.1 Freewheeling Diode (\(D_{\text{FW}}\)): Mandatory Ultrafast Diode Application

    The freewheeling diode (\(D_{\text{FW}}\)), which sustains inductor current when the switching element turns off, must be an ultrafast recovery diode with a reverse recovery time (\(t_{\text{rr}}\)) of 75 ns or less, with a recommended specification of \(t_{\text{rr}} \le 35\,\text{ns}\). Because general-purpose standard rectifier diodes (such as 1N4007) exhibit reverse recovery times in the range of several microseconds, severe shoot-through current (reverse recovery current surge) flows from the high-voltage DC rail into the internal switch the instant the MOSFET turns on, causing immediate IC failure. Consequently, the use of general-purpose rectifier diodes such as 1N4007 is strictly prohibited.

    5.2 Output Inductor (\(L_{\text{OUT}}\)): Securing Core Saturation Current (\(I_{\text{sat}}\)) Margin

    If the inductor core saturates, inductance drops sharply, potentially causing excessive current to flow into the MOSFET. Therefore, the saturation current (\(I_{\text{sat}}\)) rating of the inductor must be equal to or greater than the maximum peak current limit (\(I_{\text{LIMIT(MAX)}}\)) of the LinkSwitch-TN2.

    • LNK3294: Since \(I_{\text{LIMIT(MAX)}} = 275\,\text{mA}\), ensure a margin of at least \(I_{\text{sat}} \ge 300\,\text{mA}\).
    • LNK3296: Since \(I_{\text{LIMIT(MAX)}} = 515\,\text{mA}\), ensure a margin of at least \(I_{\text{sat}} \ge 600\,\text{mA}\).

    5.3 BYPASS Capacitor (\(C_{\text{BP}}\)) Mounting Requirements

    A low-ESR ceramic capacitor (X7R or X5R dielectric) with a capacitance of 0.1 µF or 1.0 µF should be mounted at the BYPASS (BP) pin. Because this capacitor determines the bias supply stability of the internal control circuitry, it must be mounted immediately adjacent to the BP and SOURCE pins with minimal trace length to minimize parasitic inductance.


    6. High-Voltage Safety Standards and PCB Layout: 900V Clearance Distances and Galvanic Isolation Interfaces

    6.1 Output GND Potential and Galvanic Isolation in Non-Isolated Bucks

    In a non-isolated buck topology, the output GND is directly connected to the negative (-) terminal of the rectified AC input bus. Because the output terminals are not referenced to protective earth (PE) and float at high-voltage AC line potentials, galvanic isolation devices such as optocouplers must be implemented when interfacing control signals with external system interfaces or host microcontrollers (MCUs) to prevent electrical shock hazards and controller damage.

    6.2 900V High-Voltage Clearance Distances and PCB Layout Rules

    To comply with safety standards and ensure reliable operation, apply the following layout guidelines.

    1. DRAIN Pin Isolation Distance: Apply a clearance of at least 2 mm around the DRAIN pin as an initial layout baseline. However, final creepage and clearance distances must be recalculated based on applicable safety standards, operating voltages, material groups, pollution degrees, overvoltage categories, and altitude conditions. If necessary, consider milling air slots between adjacent conductors.
    2. Primary Thermal Path: Allocate a large copper pour to traces connected to the SOURCE pins to lower thermal resistance.
    3. High-Frequency Current Loop Minimization: Minimize the loop area of the high-frequency switching loop (\(\text{high-d}i/\text{d}t\) loop)—formed by the input capacitor, MOSFET DRAIN-SOURCE, and freewheeling diode—to suppress radiated EMI.

    Official Reference Documentation: Power Integrations LinkSwitch-TN2 Family Data Sheet, Rev. Q (June 2023). Orderable component packages, current limits, output currents, and FB pin thresholds should be cross-checked against the latest revision during actual design.

  • 150 kHz CE Noise After Switching to a 2 kHz DPWM 8-Pole Compressor: Root Cause and Ferrite Countermeasure

    150 kHz CE Noise After Switching to a 2 kHz DPWM 8-Pole Compressor: Root Cause and Ferrite Countermeasure

    After replacing a 6-pole compressor with a 8-pole unit, conducted emission (CE) noise at 150kHz increased under 2kHz DPWM inverter drive conditions. The fact that noise dropped significantly when compressor operation was stopped or when the protective earth (PE) was disconnected led to tracing the common-mode current return path. Compliance with the regulatory limit was achieved by winding the PE line with 10 or more turns on a ferrite core.

    This post documents the root cause identified during that test, the reasons why rejected countermeasures were not adopted, and the items that must be re-verified before mass production.

    Test Conditions and Problem Symptoms

    ItemCondition / Symptom
    Inverter control2kHz switching frequency, DPWM method
    Compressor change6-pole motor replaced with 8-pole motor
    Problem frequency band150kHz CE noise increase
    Diagnostic result 1Noise greatly reduced when compressor drive is stopped
    Diagnostic result 2Noise greatly reduced when product PE is disconnected

    PE disconnection is a diagnostic condition used to confirm the common-mode current path. Removing the protective earth cannot be used as a product-level countermeasure.

    Root Cause of Increased 150kHz Noise

    150kHz Falls in the 75-th Harmonic Region of 2kHz Switching

    The relationship between 150kHz and the switching frequency is as follows.

    \[\frac{150\,\mathrm{kHz}}{2\,\mathrm{kHz}}=75\]

    Therefore, the 150kHz band where the problem appeared corresponds to the 75-th harmonic region of the 2kHz switching frequency.

    Furthermore, when the number of motor poles increases from 6 to 8 at the same rotational speed, the electrical frequency increases by 33.3%. This creates conditions in which the ratio of the fundamental to the switching frequency decreases and the sideband energy around the harmonics changes.

    Increased Ground Parasitic Capacitance of the 8-Pole Motor

    The 8-pole motor has a different winding and slot structure. This change was analyzed as having increased the ground parasitic capacitance \(C_g\) between the stator winding and the compressor enclosure.

    The common-mode current flowing to ground during switching can be described by the following relationship.

    \[I_{cm}=C_g\times\frac{dv}{dt}\]

    Even with the same \(dv/dt\), a larger \(C_g\) results in increased common-mode current.

    Common-Mode Noise Return Path

    150kHz common-mode current return path and PE ferrite core installation point formed by a 2kHz DPWM inverter and 8-pole compressor
    150kHz common-mode current return path and PE ferrite core installation point formed by a 2kHz DPWM inverter and 8-pole compressor

    The closed loop inferred from the test results follows this sequence.

    Inverter switching device → Motor winding → Cg → Compressor enclosure → Product chassis → PE → LISN → Power supply stage

    The significant reduction in 150kHz noise observed when compressor operation was stopped or PE was disconnected supports the conclusion that this path is dominant.

    Countermeasures Considered and Adoption Status

    Item ConsideredDecisionRationale
    PE-line ferrite core windingAdoptedWinding 10 or more turns secured sufficient impedance in the 150kHz band to suppress the ground-return common-mode current and meet the regulatory limit
    Y-Cap value changeNot adoptedBecause noise couples directly through the compressor enclosure and product chassis, the PCB power-stage Y-Cap cannot adequately bypass the chassis-loop current
    Gate resistance \(R_g\) increaseNot adopted\(dv/dt\) can be reduced, but it is difficult to maintain the switching-loss reduction objective of the 2kHz DPWM and stay within thermal limits
    Direct bonding between compressor and PCBNot adoptedThe distance between the compressor and the main PCB makes it impractical to implement a low-inductance braided-wire connection

    The general role and selection criteria for Y-Caps are covered in SMPS Y-Cap: EMC and Audible Noise. In this case, the noise path differed, so a Y-Cap change was not adopted.

    Selected Countermeasure: PE-Line Ferrite Core 10+ Turns

    The final countermeasure is to insert a ferrite core in the PE line and wind the ground wire with 10 or more turns. The multi-turn winding raises the impedance in the 150kHz band and suppresses the high-frequency common-mode return current through the PE. The CE regulatory limit was satisfied in testing after this countermeasure was applied.

    Applying the same 10-turn condition to other products requires re-verification based on the core characteristics and the actual noise path of each product.

    Three Checks Before Mass Production

    Protective Earth Continuity and Heat Generation

    The report recommends verifying the following items during the ground continuity test, in which 25A to 32A is applied in accordance with safety standards such as IEC/EN 60335.

    • Whether ground resistance satisfies 0.1Ω or less
    • Whether heat is generated in the ground wire inside the core
    • Mechanical integrity of the winding and terminal sections

    The values above are the inspection criteria presented in the report; the actual compliance determination for the product must be made by consulting the latest applicable safety standards and test conditions for that product.

    Full CE and RE Re-Scan

    Winding 10 or more turns increases the inter-turn parasitic capacitance. In practice, this effect caused noise to rise again in the CE band above several MHz or in the radiated emission (RE) band of 30MHz to 1GHz.

    Do not verify only the single 150kHz point; remeasure the full CE and RE spectrum.

    Mechanical Countermeasure Against Compressor Vibration

    Continued compressor vibration can cause friction between the ferrite core edges and the ground wire insulation. The following protective measures should also be considered.

    • Taping the inner diameter of the core
    • Reinforcing the ground wire with heat-shrink tubing
    • Applying a core-fixing holder
    • Inspecting for insulation damage after vibration endurance testing

    Summary

    This 150kHz CE problem was analyzed as a consequence of the 8-pole compressor change altering the electrical frequency and winding structure, which increased the common-mode return current through the parasitic capacitance between the winding and the enclosure. After narrowing down the path through the compressor-stop and PE-disconnection tests, winding the PE-line ferrite core with 10 or more turns raised the impedance in the 150kHz band and achieved compliance with the regulatory limit.

    Before applying this solution in mass production, ground continuity and heat generation, the full CE and RE spectrum, and abrasion of the ground wire insulation due to vibration must all be verified together. When applying the solution to other products, re-confirm the frequency characteristics of the core and the common-mode return path specific to each product.

  • Relay Flyback Diode Selection: Sizing by Coil Current and Release Time

    Relay Flyback Diode Selection: Sizing by Coil Current and Release Time

    Relay Coil Driving and Counter-EMF Suppression Design Challenges

    Electromechanical relays are critical components that provide complete galvanic isolation between control circuits and high-power loads. However, the relay coil—the mechanical actuation mechanism—is a typical inductive load that induces a high voltage spike, known as inductive kickback, when current is interrupted.

    When the current flowing through the coil is abruptly interrupted, the counter-electromotive force (counter-EMF) generated by the inductance \(L\) is governed by Faraday’s law:

    \[v_L(t) = -L \frac{di}{dt}\]

    During the brief switching transition (tens to hundreds of ns) when the low-side transistor (MOSFET or BJT) turns off, \(\frac{di}{dt}\) takes on a very large negative value, creating a positive high-voltage spike of several hundred volts or more at the drain (or collector) node of the switching device. Without an adequate surge suppression circuit, this spike exceeds the breakdown voltage (\(V_{(BR)DSS}\)) of the switching device, causing permanent damage.

    The most common countermeasure is placing a single flyback diode (freewheeling diode) in anti-parallel across the coil. However, while a simple diode clamping circuit protects the drive transistor, it introduces a secondary (2nd) trade-off: it significantly delays the relay release time, leading to contact erosion and contact welding.

    Fundamental concepts of counter-EMF suppression for inductive loads have also been covered in the guides on SMPS gate driver inductive counter-EMF suppression techniques and low-side MOSFET switch selection and snubber design. This article outlines quantitative calculation methods and engineering decision criteria to size optimal flyback and clamping diodes based on relay coil current (\(I_{coil}\)) and required release time.


    Basic Parameter Selection: Sizing Coil Current (\(I_F\)) and Reverse Breakdown Voltage (\(V_{RRM}\))

    The primary (1st) electrical parameters that must be satisfied when selecting a single flyback diode are the forward current rating (\(I_F\)) and repetitive peak reverse voltage (\(V_{RRM}\)).

    Basic driver circuit schematic comprising a relay coil, low-side N-MOSFET switch, and parallel single flyback diode, showing the forward commutation current loop at turn-off
    Basic driver circuit schematic comprising a relay coil, low-side N-MOSFET switch, and parallel single flyback diode, showing the forward commutation current loop at turn-off

    1. Coil Steady-State Current (\(I_{coil}\)) and Diode Forward Rating (\(I_F, I_{FSM}\))

    When the relay is fully picked up in the ON state, the DC steady-state current \(I_{coil}\) flowing through the coil is determined by Ohm’s law from the applied coil voltage \(V_{coil}\) and the coil DC resistance \(R_{coil}\):

    \[I_{coil} = \frac{V_{coil}}{R_{coil}}\]

    The instant the switching device turns off, magnetic flux and current continuity in the inductor dictate that the entirety of \(I_{coil}\) flowing through the coil immediately commutates into the forward path of the flyback diode. Therefore, the initial peak forward current \(I_{F(peak)}\) applied when the diode turns on matches the steady-state coil current:

    \[I_{F(peak)} = I_{coil}\]
    • Average Forward Current Rating (\(I_{F(AV)}\)): In general control applications where the relay coil switching frequency is a few Hz or less, the continuous forward rating \(I_{F(AV)}\) of the diode must be equal to or greater than \(I_{coil}\) to prevent thermal breakdown.
    • Non-Repetitive Peak Surge Current (\(I_{FSM}\)): To withstand the transient peak current \(I_{F(peak)}\) immediately after turn-off, the diode’s \(I_{FSM}\) rating must sufficiently exceed \(I_{coil}\). General-purpose devices such as the 1N400x series (\(I_{F(AV)} = 1\text{A}, I_{FSM} = 30\text{A}\)) or 1N4148 (\(I_{F(AV)} = 150\sim 200\text{mA}, I_{FSM} = 1\sim 4\text{A}\)) easily satisfy the forward current requirements of typical small to medium control relays (\(I_{coil} \approx 20\text{mA} \sim 150\text{mA}\)).

    2. Diode Reverse Voltage (\(V_{RRM}\)) Margin Sizing

    When the switching device is ON, the supply voltage \(V_{CC}\) is applied in the reverse direction across the diode. Under ideal steady-state conditions, operation is possible as long as the diode reverse breakdown voltage \(V_{RRM}\) is greater than \(V_{CC}\); however, real power rails experience superimposed switching noise, parasitic wiring inductance, and power-up surges.

    Manufacturer technical guidelines (Panasonic Relay Technical Guide, Omron General-purpose Relay Precautions) specify the following \(V_{RRM}\) margin criteria:

    • General Industrial/Consumer DC Supplies (\(12\text{V}, 24\text{V}\)): To account for supply transient voltage margins, a minimum of \(V_{RRM} \ge (2 \sim 3) \times V_{CC}\) must be secured. For example, in a \(24\text{V}\) supply system, a diode rated for \(V_{RRM} \ge 72\text{V}\) or higher is selected, and in practice, general-purpose rectifier diodes rated at \(400\text{V} \sim 1000\text{V}\) (1N4004~1N4007) are used to provide ample headroom.
    • Automotive and Harsh Environments: In automotive electrical environments where load dump events and high-energy line surges are frequent, a rating of \(V_{RRM} \ge 10 \times V_{CC}\) or higher must be selected, or a dedicated TVS diode must be placed in parallel at the supply stage.

    Caution (Not Applicable to AC Coil Relays): Flyback diodes are surge suppression devices dedicated exclusively to direct current (DC) coil relays. Connecting a diode in parallel across an AC coil relay driver circuit will short the power supply every half cycle and cannot be used; AC systems require an RC snubber (CR circuit) or an MOV (Metal Oxide Varistor)/varistor.


    Single Flyback Diode Trade-Offs: Release Time Delay and Contact Welding Risks

    If only the protection of the switching device is considered, the single diode method—which clamps the coil counter-EMF to the diode forward voltage (\(V_F \approx 0.7\text{V}\)) level—is the simplest and lowest-cost approach. However, this causes critical side effects on the reliability of the relay itself.

    Comparison waveforms of gradual exponential current decay (long time constant) with a single flyback diode versus rapid linear current decay and release time with a diode + Zener clamp
    Comparison waveforms of gradual exponential current decay (long time constant) with a single flyback diode versus rapid linear current decay and release time with a diode + Zener clamp

    1. Discharge Time Constant and Release Time (\(t_{release}\)) Delay Mechanism

    When the switch turns off, the magnetic energy stored in the coil is dissipated as it circulates through the closed loop formed by the coil internal resistance \(R_{coil}\) and the diode. The Kirchhoff’s Voltage Law (KVL) equation for this closed loop is as follows:

    \[L \frac{di(t)}{dt} + i(t) R_{coil} + V_F = 0 \Rightarrow \frac{di(t)}{dt} = -\frac{V_F + i(t) R_{coil}}{L}\]

    Because the forward voltage drop \(V_F\) of the diode is very low at approximately \(0.7\text{V}\), the counter-EMF voltage loop driving the inductor current toward 0 is extremely weak. The current decay progresses gradually and exponentially according to the inherent circuit time constant \(\tau = \frac{L}{R_{coil}}\).

    According to manufacturer measurement data, the relay opening/release time (Release Time) when using a single flyback diode is delayed by approximately 2 times to more than 5 times compared to the ideal open-circuit state without surge protection.

    2. Contact Arc Discharge and Contact Welding Mechanisms

    According to studies by leading relay manufacturers TE Connectivity (Application Note 13C3264) and Panasonic, this delay in coil current decay triggers the following contact failure chain reaction:

    1. Reduced Armature Travel Speed: As the coil current slowly decreases below the must-release voltage (Must Release Voltage / Drop-out Threshold), the magnetic pull of the coil releases the return spring force only gradually.
    2. Delayed Contact Separation Velocity: The initial opening velocity when the movable contact separates from the stationary contact slows down significantly.
    3. Extended Arc Duration: The plasma arc generated as the contact gap widens during load current interruption cannot be quenched rapidly and persists for an extended duration.
    4. Contact Erosion and Material Transfer: The high-temperature arc locally melts and spatters the contact metal (silver alloys, etc.).
    5. Occurrence of Contact Welding: Degraded contact surface roughness and micro-welding during re-solidification prevent the relay from returning, resulting in permanent welded-contact failure.

    Therefore, single flyback diode topologies should be avoided in circuits switching inrush or inductive loads, such as motors, solenoids, incandescent lamps, and large capacitor banks.


    Diode + Zener Clamp Design and Timing Calculations for Fast Release and Contact Protection

    The standard engineering solution to safely protect switching devices while preserving contact opening speed is connecting a standard diode and a Zener diode back-to-back (in series opposition).

    Fast surge suppression circuit schematic with a standard diode and Zener diode connected back-to-back (in series opposing) across the relay coil, showing clamping voltage polarities
    Fast surge suppression circuit schematic with a standard diode and Zener diode connected back-to-back (in series opposing) across the relay coil, showing clamping voltage polarities

    1. Discharge Voltage Clamping and Accelerated Current Decay Principle

    When the switching device turns off, the coil counter-EMF forces the Zener diode into its breakdown region. At this point, the clamping voltage \(V_{clamp}\) formed in the discharge loop is the sum of the Zener voltage \(V_Z\) and the diode forward voltage \(V_F\):

    \[V_{clamp} = V_Z + V_F\]

    The differential equation for the loop current decay is modified as follows:

    \[\frac{di(t)}{dt} = -\frac{V_Z + V_F + i(t) R_{coil}}{L}\]

    Because the Zener voltage \(V_Z\) is significantly larger than the coil internal voltage drop (\(i \cdot R_{coil}\)), the current decay slope \(\frac{di}{dt}\) forms a steep, nearly linear slope, discharging the current rapidly.

    2. Release Time (\(t_{release}\)) Calculation Formula

    The time \(t_{decay}\) required for the coil current to decay from steady-state current \(I_{coil}\) to the drop-out current \(I_{drop}\) where the relay armature begins to release is calculated via linear approximation as follows:

    \[t_{decay} \approx \frac{L \cdot (I_{coil} – I_{drop})}{V_Z + V_F}\]
    • \(L\): Coil inductance (\(\text{H}\))
    • \(I_{coil}\): Steady-state coil current (\(\text{A}\))
    • \(I_{drop}\): Relay release current threshold (\(\text{A}\), typically \(10\% \sim 30\%\) of rated current)
    • \(V_Z\): Zener diode breakdown voltage (\(\text{V}\))
    • \(V_F\): Forward voltage of the series standard diode (\(\text{V} \approx 0.7\text{V}\))

    As \(V_Z\) increases, the denominator grows larger, resulting in a dramatic reduction in the decay time \(t_{decay}\).

    3. Zener Voltage (\(V_Z\)) Sizing Criteria

    To restore contact separation velocity to unprotected levels and maximize contact lifespan, the Panasonic Application Guide recommends sizing the Zener voltage as follows:

    \[V_Z \ge 3 \times V_{coil}\]
    • \(12\text{V}\) relay coils: \(V_Z \ge 36\text{V}\) (select standard Zener ratings such as \(36\text{V}, 39\text{V}, 43\text{V}\))
    • \(24\text{V}\) relay coils: \(V_Z \ge 72\text{V}\) (select standard Zener ratings such as \(75\text{V}, 82\text{V}\))

    Drive Switch (MOSFET) Voltage Margin and Zener Pulse Power Rating Verification

    While applying a Zener diode to increase the discharge voltage improves relay contact reliability, it inversely increases the drain-to-source voltage (\(V_{DS}\)) stress that the low-side switching device must withstand. Therefore, quantitative verification of both the switch voltage rating and Zener power dissipation is essential.

    Transient voltage waveform showing drain-to-source voltage (V_DS) clamped to V_CC + V_Z + V_F during low-side MOSFET turn-off and Safe Operating Area (SOA) margin indication
    Transient voltage waveform showing drain-to-source voltage (V_DS) clamped to V_CC + V_Z + V_F during low-side MOSFET turn-off and Safe Operating Area (SOA) margin indication

    1. Low-Side Switch Maximum Applied Voltage and Voltage Rating Margin

    At the instant of turn-off, the drain terminal voltage \(V_{DS(max)}\) of the low-side MOSFET is superimposed by the coil clamping voltage on top of the supply voltage \(V_{CC}\):

    \[V_{DS(max)} = V_{CC} + V_Z + V_F\]

    Accordingly, the breakdown voltage rating \(V_{(BR)DSS}\) of the MOSFET must be selected to include a safety margin of \(20\% \sim 30\%\) as follows:

    \[V_{(BR)DSS} \ge 1.25 \times (V_{CC} + V_Z + V_F)\]

    [Design Calculation Example]

    • Supply Voltage: \(V_{CC} = 24\text{V}\)
    • Coil Rating: \(V_{coil} = 24\text{V}, R_{coil} = 600\,\Omega \Rightarrow I_{coil} = 40\text{mA}\)
    • Zener Diode: \(V_Z = 75\text{V}\) (\(V_Z \approx 3.1 \times V_{coil}\))
    • Series Diode: \(V_F = 0.7\text{V}\)

    Peak voltage applied across the switch: \[V_{DS(max)} = 24\text{V} + 75\text{V} + 0.7\text{V} = 99.7\text{V}\]

    Required breakdown voltage with a \(1.25\) safety margin factor: \[V_{(BR)DSS} \ge 99.7\text{V} \times 1.25 \approx 124.6\text{V}\]

    Therefore, an N-channel MOSFET rated for \(150\text{V}\) or higher must be selected as the drive transistor to secure adequate Safe Operating Area (SOA) headroom. If the existing circuit switch rating is constrained to \(60\text{V}\) or \(100\text{V}\), trade-off adjustments are necessary, such as lowering \(V_Z\) (e.g., \(V_Z \approx 1 \sim 1.5 \times V_{coil}\)) or upgrading the switch to a higher-voltage device.

    2. Zener Diode Pulse Power and Energy Dissipation Verification

    The magnetic energy \(E\) stored in the coil inductance at turn-off is given by:

    \[E = \frac{1}{2} L I_{coil}^2\]

    Most of this energy is dissipated as heat in the Zener diode during the extremely brief discharge time (\(t_{decay}\)) immediately following switch turn-off.

    • Instantaneous Peak Pulse Power (\(P_{peak}\)): \[P_{peak} \approx V_Z \times I_{coil}\] In the example above, a peak power of \(P_{peak} \approx 75\text{V} \times 0.04\text{A} = 3.0\text{W}\) is applied. Verify that this provides sufficient margin compared to the non-repetitive peak pulse power (\(P_{PPM}\)) rating of the Zener diode (or unidirectional TVS diode) (typically \(400\text{W} \sim 600\text{W}\)).
    • Average Power Dissipation (\(P_{avg}\)): Where the switching operating frequency is \(f_{sw}\), the continuous power dissipation of the Zener is as follows: \[P_{avg} = E \times f_{sw} = \frac{1}{2} L I_{coil}^2 f_{sw}\] Under typical relay switching conditions (\(f_{sw} < 1\text{Hz}\)), the average power is less than a few mW; thus, standard SMD Zener diodes rated at \(500\text{mW} \sim 1\text{W}\) easily ensure thermal stability.

    Design Decision Summary: Relay Protection Circuit Topology Selection Guide

    The selection of a relay coil surge suppression circuit is a clear engineering trade-off between minimizing circuit cost and switch voltage stress versus preserving relay release speed and contact lifespan.

    1. Protection Circuit Topology Comparison Matrix

    Parameter / Feature Single Flyback Diode Diode + Zener Clamp Parallel Resistor / RC Snubber
    Discharge Loop Voltage (\(V_{clamp}\)) \(V_F \approx 0.7\text{V}\) (Extremely low voltage) \(V_Z + V_F\) (Designer configurable) \(I_{coil} R\) (Large initial voltage spike)
    Relay Release Delay (\(t_{release}\)) Very High (2~5x delay) Very Low (Restored to unprotected baseline) Moderate delay
    Contact Arc & Lifespan Impact Increased arc duration \(\rightarrow\) welding risk Rapid arc quenching \(\rightarrow\) contact lifespan preserved Moderate
    Switch Voltage Stress (\(V_{DS}\)) \(V_{CC} + 0.7\text{V}\) (Lowest stress) \(V_{CC} + V_Z + V_F\) (Higher switch voltage rating required) \(V_{CC} + I_{coil} R\)
    Component Count & Cost 1 diode (Lowest cost) 1 diode + 1 Zener (Moderate) Resistor / capacitor (Moderate)
    Recommended Applications Non-critical signal relays, light-load switching Power relays, inductive/inrush loads, high-reliability control AC relay coil control

    2. Practical Hardware Design Checklist

    1. Verify Steady-State Coil Current: After calculating \(I_{coil} = V_{coil} / R_{coil}\), confirm that the diode’s \(I_{F(AV)}\) and \(I_{FSM}\) are equal to or greater than \(I_{coil}\).
    2. Verify Reverse Voltage Margin: Ensure that \(V_{RRM}\) of the single diode or series diode meets at least \(V_{RRM} \ge 2\sim 3 \times V_{CC}\) (\(10 \times V_{CC}\) in harsh environments).
    3. Select Topology Based on Load Characteristics:
    4. When switching high-power or inductive loads such as motors, solenoids, heaters, or power rails, adopt the diode + Zener clamp topology as standard to preserve contact lifespan.
    5. Consider a single flyback diode only for simple indicators or low-power resistive loads where bill-of-materials (BOM) cost must be minimized aggressively.
    6. Align Zener Voltage and Switch Breakdown Margin:
    7. Set the Zener voltage to approximately \(V_Z \ge 3 \times V_{coil}\).
    8. Verify that the low-side MOSFET breakdown voltage satisfies \(V_{(BR)DSS} \ge 1.25 \times (V_{CC} + V_Z + V_F)\).
    9. Evaluate Zener Surge Pulse Power: Confirm that \(P_{peak} \approx V_Z \times I_{coil}\) is within the allowable non-repetitive peak pulse power rating of the Zener or TVS diode.
  • Solving Light-Load Ripple Without an LDO: TPS54202 Eco-Mode vs TPS54308 FCCM — A Hands-On Comparison

    Solving Light-Load Ripple Without an LDO: TPS54202 Eco-Mode vs TPS54308 FCCM — A Hands-On Comparison

    When selecting a step-down converter for ripple-sensitive circuits, picking solely by rated current and efficiency is a recipe for trouble. Converters that engage Eco-mode or pulse skipping at light loads can see output ripple soar to tens of mV, severely degrading the performance of analog sensors, RF front-ends, and PLL/VCO supply rails. Texas Instruments’ TPS54202 and TPS54308 share the same 6-pin SOT-23 package and identical pinout, yet they differ decisively in light-load operating mode — a difference that completely changes the choice for ripple-sensitive designs.


    The Ripple Problem in Sensitive Circuits

    When generating a 5V or 3.3V local rail from a 24V industrial bus, the most common choice is a synchronous step-down converter. But in systems where the load is not constant — think IoT gateways where current consumption swings from a few mA during sensor polling idle periods to hundreds of mA during active cycles, or wireless modules that draw single-digit mA in standby but surge past 1A during transmission — the output ripple during light-load intervals becomes a real problem. As the load lightens, the converter enters pulse-skipping mode, the switching frequency becomes irregular, and the output capacitor repeatedly charges and discharges, dramatically increasing ripple amplitude.

    The trouble with this ripple goes beyond mere voltage variation. When the ripple frequency components overlap with an ADC’s sampling bandwidth, effective resolution (ENOB) takes a hit. It couples directly into PLL phase noise, and survives as system noise that even the CMRR of an analog signal chain cannot reject. Switching to an LDO eliminates the ripple, but in a 24V-to-5V step-down, an LDO manages only about 21% efficiency — at 1A load, that means 19W of heat. You’re trading ripple for a heatsink and extra board area.

    TPS54202 vs TPS54308 output ripple comparison by load current
    Figure 1: Output ripple (mVpp) comparison between TPS54202 (Eco-mode) and TPS54308 (FCCM) across load currents — the ripple difference becomes dramatic at light loads.

    Why Eco-Mode Ripple Grows at Light Load

    The TPS54202 is a 2A converter employing fixed 500kHz peak current-mode control with Advanced Eco-mode™. Eco-mode works by skipping switching cycles when the load drops below the level that the high-side FET’s minimum on-time can sustain — the converter only turns on the FET when the output voltage falls below the setpoint, then returns to idle once the target is reached. The impressively low 45μA no-load quiescent current (Iq) is a direct consequence of this Eco-mode operation.

    This efficiency optimization comes at a cost, however. During pulse-skipping intervals, the effective switching frequency can drop to just a few hundred Hz. A single burst of energy overcharges the output capacitor, and the load slowly bleeds it off — a pattern that repeats. As a result, output ripple amplitude climbs from 10–15mV at heavy load to 40–80mV at light load, and can exceed 100mV under certain conditions. The ripple frequency also becomes irregular, making it difficult to filter out any specific band with a notch filter.

    TPS54202 Eco-mode light-load 100mA output ripple oscilloscope waveform
    Figure 2: TPS54202 oscilloscope capture — at IOUT=100mA light load, VOUT ripple appears large on a 20mV/div scale, and the switching node (PH) waveform becomes irregular due to pulse skipping. (Source: TI TPS54202 datasheet Figure 7-8)

    How FCCM Solves the Ripple Problem

    The TPS54308 comes in the same 6-pin SOT-23 package with an identical pinout to the TPS54202, but there is one decisive difference: it operates in FCCM (Forced Continuous Conduction Mode), never stopping switching even at light load. No matter how low the load current drops, the 350kHz switching frequency remains constant, and the inductor current is allowed to flow in the negative direction to maintain continuous conduction. This design philosophy trades away some light-load efficiency (Iq = 300μA, versus 45μA for the TPS54202) in exchange for keeping output ripple predictably low across the entire load range.

    In FCCM, output ripple is fundamentally determined by \( \Delta V_{OUT} \approx \Delta I_L \times ESR + \Delta I_L / (8 \times f_{SW} \times C_{OUT}) \), where \( \Delta I_L \) itself is fixed by the constant switching frequency and duty cycle. There is no structural reason for ripple to increase at light load. In practice, with a 12V-to-5V, \( L = 10\mu H \), \( C_{OUT} = 2 \times 22\mu F \) MLCC configuration, the TPS54202 exhibits over 60mVpp ripple at light load (10mA), while the same board fitted with a TPS54308 keeps ripple within 15–20mVpp. With ripple frequency locked at 350kHz, an additional notch filter targeting that single band can further suppress it.

    TPS54308 FCCM light-load 100mA output ripple oscilloscope waveform
    Figure 3: TPS54308 oscilloscope capture — under identical light-load conditions (IOUT=100mA), VOUT ripple is suppressed to a 10mV/div scale thanks to FCCM, and the PH waveform remains steady at a fixed 350kHz. (Source: TI TPS54308 datasheet Figure 8-8)

    Why Not Just Use an LDO?

    The first workaround an engineer facing a ripple problem reaches for is an LDO. Output ripple is virtually nonexistent at the μV level, and the external BOM is just two capacitors. But this choice inflicts a severe efficiency penalty, especially when the input-to-output voltage differential is large. For example, an LDO supplying 5V at 0.5A from a 24V input dissipates \( (24V – 5V) \times 0.5A = 9.5W \) — nearly four times the power delivered to the load (2.5W). A SOT-223 package cannot handle this thermally, and even a TO-220 with a heatsink will cook nearby components.

    The TPS54308 FCCM converter, under the same conditions (24V to 5V, 0.5A), delivers roughly 88–90% efficiency, meaning the converter itself dissipates only about 0.28W. That’s a 97% reduction in loss compared to the LDO — translating directly to no heatsink required, a tiny SOT-23 6-pin package, and layout freedom on tight boards. Moreover, the FCCM keeps ripple at a sufficiently low 15–20mVpp — not quite LDO levels, but adding a single LC filter stage after the converter can bring it below 5mVpp for ultra-low-noise rails.

    ApproachOutput RippleEfficiency (24V→5V, 0.5A)Power LossHeatsink
    LDO (e.g., LM7805)~μVpp21%9.5WRequired (TO-220 + heatsink)
    TPS54202 (Eco-mode)60–80mVpp (light load)~90%0.28WNot required
    TPS54308 (FCCM)15–20mVpp~89%0.31WNot required
    Table 1: Ripple-efficiency trade-off among LDO, Eco-mode converter, and FCCM converter

    Real-World Swap: TPS54202 to TPS54308

    On a sensor interface board operating from 24V, producing 5V for a variable 10mA–500mA load, the initial design using the TPS54202 performed well at medium-to-heavy loads (200mA and above). But during the idle periods between sensor polling cycles (approximately 10–15mA), output ripple shot up to 70mVpp. This ripple jittered the LSB of a 16-bit ADC by 4–5 bits, dragging effective resolution down to roughly 11 bits — and software averaging could not fully eliminate it.

    After swapping to the TPS54308 on the same board, with the same \( L = 10\mu H \) and \( C_{OUT} = 2 \times 22\mu F \) components, light-load ripple dropped to 18mVpp — a 74% reduction. Thanks to the fixed 350kHz switching frequency, the ripple FFT spectrum also concentrated into a single peak. ADC effective resolution recovered to 14.2 bits, and with software oversampling, better than 15 bits was achievable. Power dissipation increased by roughly 30mW (from the Iq difference of 45μA to 300μA), but overall efficiency remained at 89% with no thermal issues whatsoever.

    Notably, the TPS54202 and TPS54308 share the exact same pinout (1: GND, 2: SW, 3: VIN, 4: FB, 5: EN, 6: BOOT). All these improvements were obtained by simply desoldering the TPS54202 and soldering in a TPS54308 — zero PCB changes required. One minor consideration: the TPS54308 switches at 350kHz versus the TPS54202’s 500kHz, so adjusting the inductor value can further optimize for the same ripple target if desired.

    Before and after replacing TPS54202 with TPS54308 — ripple reduction
    Figure 4: Ripple comparison before and after replacing TPS54202 with TPS54308 on the same PCB — a 74% reduction from 70mVpp to 18mVpp, restoring ADC effective resolution from 11 bits to 14.2 bits.

    Spec Comparison and Selection Criteria

    ParameterTPS54202TPS54308
    Input Voltage4.5–28V4.5–28V
    Output Current2A3A
    Integrated FETs (HS+LS)148 + 78mΩ85 + 40mΩ
    Switching Frequency500kHz (spread spectrum)350kHz (fixed)
    Light-Load ModeAdvanced Eco-mode™ (pulse skip)FCCM (forced continuous conduction)
    Quiescent Current (Iq)45μA300μA
    Soft Start5ms (internal)5ms (internal)
    ProtectionOCP, OVP, TSDOCP, OVP, TSD
    PackageSOT-23 (6)SOT-23 (6)
    PinoutGND-SW-VIN-FB-EN-BOOTGND-SW-VIN-FB-EN-BOOT (identical!)
    Table 2: TPS54202 vs TPS54308 specification comparison

    For ripple-sensitive analog circuits, precision sensor supplies, or local rails in RF blocks, the predictable low ripple that the TPS54308’s FCCM delivers is far more valuable than the TPS54202’s light-load efficiency advantage. Conversely, in battery-powered devices where light-load efficiency directly governs runtime and the load consists of ripple-tolerant digital circuits, the TPS54202’s 45μA Iq and Eco-mode make it the better choice. Since both parts share an identical pinout, the most practical approach during prototyping is to test both, measure ripple and efficiency, and make the final decision based on real data.

  • How to select a bridge rectifier diode

    How to select a bridge rectifier diode

    Characteristics of Diodes

    As shown in the figure, a diode is a component that can allow current to flow only in the direction of ▶. This is a nonlinear relationship in which the forward current \( V_{F} \) rapidly increases when a voltage is applied across the diode above the forward voltage \( V_{F} \). In addition, when the forward current \( I_{F} \) flows, a forward voltage drop \( V_{F} \) must occur.

    Since power loss occurs at this time, attention should be paid to component heating in a high-current rectification circuit. When the diode is heated, leakage current increases, and there is a risk of fire due to thermal runaway. Therefore, most diode plastic molds meet the flame retardant standard of UL94V-0 or higher.

    Diode Forward Voltage(\( V_{F} \)) – Forward Current(\( I_{F} \))Characteristic

    Select the Reverse Maximum Voltage \(V_{RM}\) of the bridge diode

    In the bridge rectification circuit, while the diode is conducting, the applied voltage \( e\) of each diode terminal voltage \(V_{D}\) becomes \(\sqrt{2}\times e_{rms}\). In reality, if the input voltage of the AC fluctuates, \( e_{rms}\) also changes in proportion to it, so that \(V_{D}\) should not exceed the reverse maximum voltage \(V_{RM}\) of the diode even at the maximum input voltage.

    In addition, since the actual rectification circuit has the influence of external noise such as surges, \(V_{RM}\) should be selected sufficiently. In general, a Reverse voltage of twice the rectified voltage is selected, and if the applied voltage is unstable, a higher Reverse voltage selection is required.


    Selection of forward current \(I_{F}\) for bridge diode

    In a typical rectifying circuit, the current \(i_{c}\) flowing through the diode flows in a pulse waveform rather than a sine wave. This pulse current has a maximum value that changes under various conditions.

    First, since the average value \(I_{ave}\) of \(i_{c}\) flowing through the diode must be equal to the DC current \(I_{O}\) after rectification, if the period of half-cycle is \(T\), and the period of current flowing is \(t_{1}\), it becomes \(\frac{1}{T}\int_{0}^{t_{1}}i_{c}dt=I_{0}\).

    Relation of RMS and Peak to Average Diode Current in Capacitor-input Circuits
    From O.H Schade, Proc. IRE, Vol. 31, 1943, p. 356

    In general, the forward current \(I_{F}\) of a rectifying diode is maximum rated from the average value of this \(i_{c}\). However, this is the value when the current flows in direct current, and the pulse current should be considered low in the rated value. The maximum value \(i_{CP}\) of this pulsed current can be obtained from O.H. Schade’s graph. (n\) of \(n\omega CR_{L}\) on the horizontal axis has a coefficient of 0.5 at double voltage rectification, 1 at half-wave rectification, and 2 at full-wave rectification. \(C\) is the capacitor capacity, and \(R_{L}\) is the load resistance value.

    Next, \(R_{S}/\left ( nR_{L} \right )\) of the vertical axis means a ratio of the load resistance and the line impedance. The line impedance \(R_{S}\) should be considered to include not only the resistance value of the wiring but also the winding resistance of the power transformer.

    Under these conditions, the values of the left vertical axis are read from the graph below. This value multiplied by the output current \(I_{O}\) is the maximum current value \(i_{CP}\).


    Selection of diodes considering surge current

    Another current condition of the diode is surge current \(I_{FSM}\). In the rectifying circuit, when the power switch is initially operated, the charging voltage of the capacitor is set to 0V. Therefore, at the moment when the switch is operated, a large charging current flows to the capacitor. This is called the inrush current, and the terminal voltage of the capacitor is increased by this large charging current, and accordingly, the current value of the charging gradually becomes a normal state.

    In general, the surge current \(I_{FSM}\) of a rectifying diode has a value of about 10 times that of forward current \(I_{F}\). However, this is a guarantee value of one cycle and the value decreases when the temperature of the diode is high.


    Power loss of diode

    The diode suffers power loss due to the forward voltage drop \(V_{F}\) and the forward current \(I_{F}\). And as a result, it generates heat and increases the temperature. Silicon diodes currently in general must not exceed the maximum junction temperature \(T_{j(max)}\) 150℃. Since the current rating of the diode is determined under the condition of reaching the junction temperature, it is necessary to install a heatsink to lower the temperature when the temperature is high.

    It is not easy to calculate the power loss of a diode strictly. The simple calculation method is calculated by multiplying the output current \(I_{O}\) after rectification at the forward voltage drop \(V_{F}\) as the loss. In addition, in a bridge diode, the total loss should be doubled because current always flows through two diodes.

  • Type of rectifier according to the number of diodes

    Type of rectifier according to the number of diodes


    A half-wave rectifier with one diode

    Commercial power is a sinusoidal wave of 50/60 Hz, which is a symmetrical waveform of positive and negative voltages at every half of the frequency. Rectifying only a positive voltage with one diode is called a half-wave rectifier.

    At this time, the diode charges the capacitor with a positive voltage and prevents the charge in the opposite direction by reverse voltage to the diode in a negative voltage cycle. In this case, the direct current output current \( I_{O} \) is an average value of the capacitor charging current \( i_{C} \) and \( I_{O}=\frac{1}{T}\int_{0}^{t}i_{C}dt \).

    As such, in a half-wave rectifier, the charging current \(i_{C} \) of the capacitor is charged only once per cycle of the power supply frequency, so the current maximum \(i_{C,peak} \) gets that big. Therefore, if the output current is large, the half-wave rectifier has a large capacitor to reduce the output ripple. Therefore, it should only be used in circuits with small output currents.

    Half-wave rectifier

    A full-wave rectifier with two diodes

    The full-wave rectifier uses two diodes to rectify both positive and negative voltages of sine waves. A full-wave rectifier using two diodes requires two windings around the center tap of the transformer on the secondary side. In each transformer winding, diode \(D_{1}\) turn-on in the positive half cycle, and diode \(D_{2}\) turn-on in the negative half cycle. Therefore, the rectified waveform is a pulse waveform in which the negative half-period of the sine wave is inverted.

    Full-wave rectifier

    A full-wave rectifier with four diodes(Bridge Diode)

    The most commonly used is a full-wave rectifier using four diodes, also called a bridge rectifier. Four diodes should be used instead of one trans-winding, but it is not a big drawback because many bridge diodes with four diodes packaged are on the market.

    The current in the positive and negative half cycles alternately charges the capacitor, so it is fully rectified, but two diodes are inserted in series in the current path, which doubles the forward voltage drop \(V_{F} \) of the diode and increases the loss.

    For example, let calculate the efficiency of a 12W circuit with a rectified voltage of 12V and an output current of 1A. If the forward voltage drop \(V_{F} \) of the diode is 1V, for full-wave rectification using the center tap,

    $$\eta = \frac{12W}{\left ( 12V + 1V_{F} \right )\times 1A}=92\%$$

    For full-wave rectifier using a bridge diode,

    $$\eta = \frac{12W}{\left ( 12V + 2V_{F} \right )\times 1A}=86\%$$

    There is a big difference in efficiency.

    Despite these shortcomings, bridge rectifier are widely used because the center tap of the transformer can be removed and the circuit can be simplified using commercially available bridge diodes.

    Bridge rectifier

    Use a rectifier suitable for the purpose of the circuit

    As above, each rectifier has clear disadvantages and advantages. If one diode is used, the circuit is simple, but because the charging current of the capacitor is large, it must be used for small output, and if two diodes are used, the efficiency is high, but the center tab of the transformer has to be designed. Bridge diodes are simple to design, but efficiency should be consider the forward voltage drop of the diodes.

    Recently, synchronous rectifier, which are methods of rectifying using FET instead of diodes, have been used for high efficiency, but this will be explained later.

  • What is the difference between a linear regulator and a switching regulator?

    What is the difference between a linear regulator and a switching regulator?


    Use a linear regulator if power stability is required

    Linear regulator, called series regulator or shunt regulator, are mainly used when precise voltages are needed or when small power is needed, and when the unit price of the product has to be lowered. Linear regulator have very small electrical noise generation in a simple circuit configuration and have a small output ripple voltage, allowing them to configure high-stability power sources.

    However, a linear regulator uses a transistor to create a difference between an input voltage and an output voltage, resulting in a large power loss when the output current is large. Since all power losses are generated by heat, heat dissipation measures such as heat sinks are needed not to exceed the rated operating temperature. Therefore, when high output is required, power loss increases, making it difficult to use.

    Disadvantages of Linear Regulator
    Disadvantages of Linear Regulator

    Use switching regulators when high efficiency power is required

    Switching regulators are mainly used when high-efficiency power is required or when circuits need to be miniaturized. For example, since heat loss in linear regulators can be solved by switching loss in switching regulators, the power conversion efficiency is high and the area required for heat dissipation is small.

    In addition, the lower the operating frequency, the larger the size of the power transformer, so the linear regulator that converts 50/60Hz, which is a commercial power source, has a big and heavy power transformer. On the other hand, switching regulators can make the operating frequency several tens of kHz or more, making the transformer used for power conversion smaller and lighter.

    In addition, the linear regulator must make a DC voltage by dropping and rectifying the voltage by a transformer of commercial power. Therefore, the output current flows through the rectifying circuit as it is, and the loss of the rectifier diode is large, and the smoothing capacitor must also be large. However, the switching regulator uses a direct current voltage that directly rectifies commercial power, so the loss of the rectifier diode is small due to the small current, and the smoothing capacitor can be used small with an operating frequency of several tens of kHz or more.

    However, switching regulators are complicated in circuit configuration and operation. In addition, measures to reduce noise caused by switching are needed.

    Linear RegulatorSwitching egulator
    Step Down(Buck)
    Step Up(Boost)
    Buck-Boost
    Invert
    O
    X
    X
    X
    X
    X
    X
    X
    EfficiencyLowHigh
    Output CurrentLowHigh
    NoiseLowHigh
    DesignSimpleComplicated
    CostLowMiddle

    Recently, switching regulators are mainly used

    Recently, circuit integration technology has developed, and circuits that require complex functions are implemented as one IC. Switching regulators are also able to configure high-efficiency switching regulators with only a few peripheral circuit configurations. Of course, the types of parts depending on the use are also subdivided.

    However, if the method of using such an IC is not accurate, it may cause accidents such as a decrease in reliability or damage to parts. Therefore, the design of switching regulators is very important.

    Examples of switching regulators by TI (link)
  • Why do electronic circuits need regulated power supply?

    Why do electronic circuits need regulated power supply?


    The electronic circuit operates on DC power

    All electronic devices require power supply through an AC 110V/220V voltage which is a commercial power system(or a battery) for the operation of the device. In addition, these electronic devices require stable power sources such as 3.3V, 5V, and 12V.

    Electronic devices supplied with power through commercial power supply convert and rectified voltage to the required value by the power transformer to create a DC voltage and use it in a circuit. However, in a rectified DC power source, the performance of the device cannot be fully demonstrated because the stability and precision of the voltage are not good due to changes in the input voltage or a voltage drop of a transformer or rectifier diode.


    Causes of voltage fluctuations

    Quality of commercial power supply voltage

    Commercial power fluctuations exist even in countries with very good power systems using sufficient costs for power plants, etc. Most of them have small fluctuations of around ±5%, but some countries under development have a very large voltage drop of more than 10-20V.

    Power Transformer Voltage Drop

    Although it depends on the size of the transformer, a voltage drop occurs depending on the resistance of the wire because the copper wire is wound more than hundreds of times. In addition, since the leakage inductance between the primary and secondary of the transformer is inserted in series, a voltage drop occurs.

    Voltage drop in rectifier diode

    Bridge diodes, which are widely used for rectification, have forward voltage drops depending on the current

    Ripple Voltage

    Since the AC voltage of the commercial power source is sinusoidal, ripple voltage occurs due to charging and discharging even if it is smooth with a rectifier capacitor. This is represented by voltage fluctuations of twice the frequency in the case of full-wave rectification. In addition, when a load fluctuation occurs, a larger ripple voltage fluctuation occurs due to the imbalance of charging and discharging of the rectifier capacitor.

    full_wave_rectifier
    Full-wave rectifier

    Electronic circuits require a rated voltage

    All electronic components, such as motors and relays, as well as semiconductors such as ICs, have a rated voltage that is recommended to be used and a maximum voltage that guarantees operation. Therefore, if the voltage value is exceeded, the electronic component may not operate as designed, have a shorter lifespan, or may be damaged.

    For example, the rated voltage of most TTL ICs is 5V, the voltage that guarantees the operation is 4.5 to 5.5V, and the maximum voltage is 6 to 7V. In addition, in signal amplification circuits such as OPAMP, supply voltage fluctuations become signal fluctuations or noise. As a result, the designed precision or stability cannot be obtained.

    As such, the fluctuation of the power voltage is a problem to be solved in terms of the performance and reliability of the device. Therefore, power stabilization and regulated power supply are required through circuit design